Let's say we have a project for an Altera FPGA in the Quartus II development environment. Let's carry out a software simulation: apply a certain signal to the FPGA inputs and see what happens at its outputs. To do this, we will use the built-in Simulation Waveform Editor tool.
Necessary
- - Personal Computer;
- - installed development environment Quartus II.
Instructions
Step 1
First of all, let's launch the Quartus II IDE and open the required project. Now let's create a new file. Press the key combination Ctrl + N or through the menu File -> New…. In the window that opens, select the file type - University Program VWF.
Step 2
The Simulation Waveform Editor tool will launch. Let's immediately save this file, still empty, under an arbitrary name in the project folder: Ctrl + S (or File -> Save). I will name the file "data_test.vwf" because I will feed data to the FPGA pin called "DATA".
Now we need to add our tires to the project. Go to the menu Edit -> Insert -> Insert Node or Bus…. The "Insert node or Bus" window will open, where we will click the Node Finder … button to search for available FPGA buses in the project.
Step 3
In the Node Finder window, click the List button. A list of found nodes and project buses will appear in the left part of the window. To select, add them to the right field by clicking the corresponding buttons. Or add everything at once by clicking the ">>" button. Confirm your selection by clicking on the "OK" button. In the Insert Node or Bus window, also click OK.
Step 4
Signal level diagrams of the selected pins have appeared in the pulse shape window. Moreover, the level of the input signals CLK and DATA is still equal to logical zero, and the level of the output is undefined. You need to set their shape.
Step 5
But first, you need to set the timing parameters that will be used by the Simulation Waveform Editor during simulation. In the menu Edit -> Grid Size … set the step of the time grid. And in the menu Edit -> Set End Time … we will indicate the duration of the simulation.
Step 6
Let's set the parameters of the clock pulse. In the left field, select the desired signal by the name Name by clicking on it with the left mouse button. Now go to the menu: Edit -> Value -> Overwrite Clock … In the opened Clock window, set the period (Period), phase (Offset) and duty cycle (Duty cycle) of the clock pulse.
Step 7
Let's set the waveform Data. Select it and in the menu: Edit -> Value select the appropriate type. I will select a randomly changing signal Random Values … and configure its parameters in the window that opens.
After that, save the signal settings (Ctrl + S).
Step 8
Now you can run functional simulation: Simulation -> Run Functional Simulation or by clicking the corresponding button on the menu bar. Quartus will simulate and display the result in a new Simulation Waveform Editor window.
Step 9
In the window that opens, you can see the calculated output signals on the FPGA pins, which were obtained as a result of the simulation performed by the Simulation Waveform Editor utility.